The program control instructions covered in this article are used to alter the program scan from its normal sequence. The use of program control instructions can shorten the time required to complete a program scan.
Portions of the program not being utilized at any particular time can be jumped over, and outputs in specific zones in the program can be left in their desired states. Typical industrial program control applications are explained.
Control Instructions in PLC
Master Control Reset Instruction
Several output-type instructions, which are often referred to as override instructions, provide a means of executing sections of the control logic if certain conditions are met. These program control instructions allow for greater program flexibility and greater efficiency in the program scan.
Portions of the program not being utilized at any particular time can be jumped over, and outputs in specific zones in the program can be left in their desired states. Program control instructions are used to enable or disable a block of logic program or to move execution of a program from one place to another place.
Figure 1 shows the Program Control menu tab for the Allen- Bradley SLC 500 PLC and its associated RSLogix software. The program control commands can be summarized as follows:
- JMP (Jump to Label): Jump forward/backward to a corresponding label instruction.
- LBL (Label): Specifies label location.
- JSR (Jump to Subroutine): Jump to a designated subroutine instruction.
- RET (Return from Subroutine): Exits current subroutine and returns to previous condition.
- SBR (Subroutine): Identifies the subroutine program.
- TND (Temporary End): Makes a temporary end that halts program execution.
- MCR (Master Control Reset): Clears all set non-retentive output rungs between the paired MCR instructions.
- SUS (Suspend): Identifies conditions for debugging and system troubleshooting.
Hardwired master control relays are used in relay control circuitry to provide input/output power shutdown of an entire circuit.
Figure 2 shows a typical hardwired master control relay circuit. In this circuit, unless the master control relay coil is energized, there is no power flow to the load side of the MCR contacts.
PLC manufacturers offer a form of a master control relay as part of their instruction set. These instructions function in a similar manner to the hardwired master control relay; that is, when the instruction is true, the circuit functions normally, and when the instruction is false, non-retentive outputs are switched off.
Because these instructions are not hardwired but programmed, for safety reasons they should not be used as a substitute for a hardwired master control relay, which provides emergency I/O power shutdown.
A Master Control Reset (MCR) instruction is an output coil instruction that functions like a master control relay. MCR coil instructions are used in pairs and can be programmed to control an entire circuit or to control only selected rungs of a circuit.
In the program of Figure 3 , the MCR is programmed to control an entire circuit. The operation of the program can be summarized as follows:
- When the MCR instruction is false, or de-energized, all non-retentive (non-latched) rungs below the MCR will be de-energized even if the programmed logic for each rung is true.
- All retentive rungs will remain in their last state.
- The MCR instruction establishes a zone in the user program in which all non-retentive outputs can be turned off simultaneously.
- Retentive instructions should not normally be placed within an MCR zone because the MCR zone maintains retentive instructions in the last active state when the instruction goes false.
- An off-delay timer will start timing when in a de-energized MCR zone.
Allen-Bradley SLC 500 controllers use the master control reset instruction to set up single or multiple zones within a program. The MCR instruction is used in pairs to disable or enable a zone within a ladder program, and it has no address.
Figure 4 shows the programming of an MCR fenced zone with the zone true. The operation of the program can be summarized as follows:
- The MCR zone is enclosed by a start fence, which is a rung with a conditional MCR, and an end fence, which is a rung with an unconditional MCR.
- Input A of the start rung is true so all outputs act according to their rung logic as if the zone did not exist.
Figure 5 shows the programmed MCR fenced zone with the zone false. The operation of the program can be summarized as follows:
- When the MCR in the start fence is false, all rungs within the zone are treated as false. The scan ignores the inputs and de-energizes all non-retentive outputs (that is, the output energize instruction, the on-delay timer, and the off-delay timer).
- All retentive devices, such as latches, retentive timers, and counters, remain in their last state.
- Input A of the start rung is false so output A and T4:1 will be false and output B will remain in its last state.
- The input conditions in each rung will have no effect on the output conditions.
A common application of an MCR zone control involves examining one or more fault bits as part of the start fence and enclosing the portion of the program you want de-energized in case of a fault in the MCR zone. In case of a detected fault condition, the outputs in that zone would be de-energized automatically.
If you start instructions such as timers or counters in an MCR zone, instruction operation ceases when the zone is disabled. The TOF timer will activate when placed inside a false MCR zone. When troubleshooting a program that contains an MCR zone, you need to be aware of which rungs are within zones in order to correctly edit the circuit.
MCR-controlled areas must contain only two MCR instructions—one to define the start and one to define the end. Never overlap or nest MCR zones. Any additional MCR instructions, or a jump instruction programmed to jump to an MCR zone, could produce unexpected and damaging results to your program and to machine operation.
In PLC programming it is sometimes desirable to be able to jump over certain program instructions when certain conditions exist. The jump (JMP) instruction is an output instruction used for this purpose. When the jump instruction is used, the PLC will not execute the instructions of a rung that is jumped.
The jump instruction is often used to jump over instructions not pertinent to the machine’s operation at that instant. In addition, sections of a program may be programmed to be jumped should a production fault occur. Some manufacturers provide a skip instruction, which is essentially the same as the jump instruction.
The program of Figure 6 illustrates the use of a jump instruction in conjunction with Allen-Bradley SLC 500 programmable controllers. Addresses Q2:0 through Q2:255 are the addresses used for the jump (JMP) instructions. The label (LBL) instruction is a target for the jump instruction.
In addition, the jump instruction with its associated label must have the same address. The area of the program that the processor jumps over is defined by the locations of the jump and label instructions in the program. If the jump coil is energized, all logic between the jump and label instructions is bypassed and the processor continues scanning after the LBL instruction.
The operation of the program can be summarized as follows:
- When the switch is open the jump instruction is not activated.
- With the switch open, closing PB turns on all three pilot lights.
- When the switch is closed the jump (JMP) instruction will activate.
- With the switch closed, pressing PB turns on pilot lights PL1 and PL3 only.
- Rung 3 is skipped over during the PLC program scan so PL2 is not turned on.
Figure 7 illustrates the effect on input and output instructions of jumped rungs in a program. The label instruction is used to identify the ladder rung that is the target destination but does not contribute to logic continuity. For practical purposes the label instruction is always considered to be logically true. The operation of the program can be summarized as follows:
- When rung 4 has logic continuity, the processor is instructed to jump to rung 8 and continue to execute the main program from that point.
- Jumped rungs 5, 6, and 7 are not scanned by the processor.
- Input conditions for the jumped rungs are not examined and outputs controlled by these rungs remain in their last state.
- Any timers or counters programmed within the jump area cease to function and will not update themselves during this period. For this reason they should be programmed outside the jumped section in the main program zone.
You can jump to the same label from multiple jump locations, as illustrated in the program of Figure 8 .
In this example, there are two jump instructions addressed Q2:20. There is a single label instruction addressed Q2:20. The scan can then jump from either jump instruction to label Q2:20, depending on whether input A or input D is true. It is possible to jump backward in the program, but this should not be done an excessive number of times.
Care must be taken that the scan does not remain in a loop too long. The processor has a watchdog timer that sets the maximum allowable time for a total program scan. If this time is exceeded, the processor will indicate a fault and shut down.
The forward jump is similar to an MCR instruction in that both permit an input logic condition to skip over a block of PLC ladder logic. The main difference between the two is in how the outputs are handled when the instructions are executed.
The MCR instruction sets all non-retentive outputs to the false state and keeps the retentive outputs in their last state. The JMP instruction leaves all outputs in their last state. You should never jump into a Master Control Reset zone.
If you do, instructions that are programmed within the MCR zone starting at the LBL instruction and ending at the end MCR instruction will always be evaluated as though the MCR zone is true, without consideration to the state of the start MCR instruction.
In addition to the main ladder logic program, PLC programs may also contain additional program files known as subroutines. A subroutine is a short program that is used by the main program to perform a specific function. Large programs are often broken into subroutine program files, which are called and executed from the main program.
In the SLC 500 series PLCs, the main ladder logic program is in program file two (shown as LAD 2). Ladder logic programs for subroutines can be placed in file number three (LAD 3) through fi le number 255 (LAD 255).
Use of subroutines is a valuable tool in PLC programming. At times it is better to construct programs that consist of several subroutines than a lengthy single program. When programs are written with subroutines, each subroutine can be tested individually for functionality. These subroutines can then be called from the main program as illustrated in Figure 9 .
When a subroutine is called from the main program, the program is able to escape from the main program and go to a program subroutine to perform certain functions and then return to the main program.
In situations in which a machine has a portion of its cycle that must be repeated several times during one machine cycle, the subroutine can save a great deal of duplicate programming.
The sequence of rungs could be programmed one time into a subroutine and just called when needed. The subroutine concept is the same for all programmable controllers, but the method used to call and return from a subroutine uses different commands, depending on the PLC manufacturer.
The subroutine-related instructions used in the Allen-Bradley PLCs shown in Figure 10 are the jump to subroutine (JSR) output instruction, the subroutine (SBR) input instruction, and the return (RET) output instruction. The subroutine instructions can be summarized as follows:
Jump to Subroutine (JSR): The JSR instruction is an output instruction that causes the scan to jump to the program file designated in the instruction. It is the only parameter entered in the instruction. When rung conditions are true for this output instruction, it causes the processor to jump to the targeted subroutine file. Each subroutine must have a unique file number (decimal 3 – 255).
Subroutine (SBR): The SBR instruction is the first input instruction on the first rung in the subroutine file. It serves as an identifier that the program file is a subroutine. This file number is used in the JSR instruction to identify the target to which the program should jump. It is always true, and although its use is optional, it is still recommended.
Return (RET): The RET instruction is an output instruction that marks the end of the subroutine file. It causes the scan to return to the main program at the instruction following the JSR instruction where it exited the program. The scan returns from the end of the file if there is no RET instruction. The rung containing the RET instruction may be conditional if this rung precedes the end of the subroutine. In this way, the processor omits the balance of a subroutine only if its rung condition is true.
The jump to subroutine (JSR), subroutine (SBR), and return (RET) instructions are used to direct the controller to execute a subroutine file.
Figure 11 shows a materials conveyor system with a flashing pilot light as a subroutine. The operation of the program can be summarized as follows:
- If the weight on the conveyor exceeds a preset value, the solenoid is de-energized and pilot light PL1will begin flashing.
- When the weight sensor switch closes, the JSR is activated and directs the processor scan to jump to the subroutine U:3.
- The subroutine program is scanned and pilot light PL1 begins flashing.
- When the weight sensor switch opens, the processor will no longer scan the subroutine area and pilot light PL1 will return to its normal on state.
The Allen-Bradley SLC 500 controller main program is located in program file 2 whereas subroutines are assigned to program file numbers 3 to 255. Each subroutine must be programmed in its own program file by assigning it a unique file number.
Figure 12 illustrates the procedure for setting up a subroutine and can be summarized as follows:
- Note each ladder location where a subroutine should be called.
- Create a subroutine file for each location.
- Each subroutine file should begin with an SBR instruction.
- At each ladder location where a subroutine is called, program a JSR instruction specifying the subroutine file number.
- The RET instruction is optional. The end of a subroutine program will cause a return to the main program. If you want to end a subroutine program before it executes to the end of program file, a conditional return (RET) instruction may be used.
An optional SBR instruction is the header instruction that stores incoming parameters. This feature lets you pass selected values to a subroutine before execution so the subroutine can perform mathematical or logical operations on the data and return the results to the main program.
For example, the program shown in Figure 13 will cause the scan to jump from the main program file to program file 4 when input A is true. When the scan jumps to program file 4, data will also be passed from N7:30 to N7:40.
When the scan returns to the main program from program file 4, data will be passed from N7:50 to N7:60. Nesting subroutines allows you to direct program flow from the main program to a subroutine and then to another subroutine, as illustrated in Figure 14 .
Nested subroutines make complex programming easier and program operation faster because the programmer does not have to continually return from one subroutine to enter another. Programming nested subroutines may cause scan time problems because while the subroutine is being scanned, the main program is not.
Excessive delays in scanning the main program may cause the outputs to operate later than required. This situation may be avoided by updating critical I/O using immediate input and/or immediate output instructions.
Immediate Input and Immediate Output Instructions
The immediate input and immediate output instructions interrupt the normal program scan to update the input image table file with current input data or to update an output module group with the current output image table file data.
These instructions are intended to be used only for time-critical I/O data. The immediate input (IIN) Allen-Bradley PLC-5 instruction is used to read an input condition before the I/O update is performed.
This operation interrupts the program scan when it is executed. After the immediate input instruction is executed, normal program scan resumes. This instruction is used with critical input devices that require updating in advance of the I/O scan. The operation of the immediate input instruction is illustrated in Figure 15 .
When the program scan reaches the immediate input instruction, the scan is interrupted and the bits of the addressed word are updated. The immediate input is most useful if the instruction associated with the critical input device is at the middle or toward the end of the program.
The immediate input is not needed near the beginning of the program since the I/O scan has just occurred at that time. Although the immediate input instruction speeds the updating of bits, its scan-time interruption increases the total scan time of the program. The operation of the program can be summarized as follows:
- When the scan reaches a true IIN instruction, the scan is interrupted.
- The processor updates 16 bits in the input image table at the location indicated on the IIN instruction.
- The two-digit address on the IIN instruction is composed of the rack number (first digit) and the I/O group number (second digit) containing the input or inputs and needs immediate updating.
The immediate output (IOT) Allen-Bradley PLC-5 instruction is a special version of the output energize instruction used to update the status of an output device before the I/O update is performed. The immediate output is used with critical output devices that require updating in advance of the I/O scan. When the program scan reaches the immediate output instruction, the scan is interrupted and the bits of the addressed word are updated.
The operation of the immediate output instruction is illustrated in Figure 16 and can be summarized as follows:
- When the program scan reaches a true IOT instruction, the scan is interrupted and the data in the output image table at the word address on the instruction are transferred to the real-world outputs.
- In this example, the IOT instruction follows the output energize instruction.
- Thus, the output image table word is updated fi rst, and then the data are transferred to the real-world outputs.
The Allen-Bradley SLC 500 PLC’s immediate I/O instructions contain a few improvements over those of the PLC-5. The SLC 500’s instructions, which are called immediate input with mask (IIM) and immediate output with mask (IOM), allow the programmer to specify which of the 16 bits are to be copied from an input module to the input image data table (or from the output image table to an output module). The other bits in the input image table or output module are not affected by these instructions.
In addition, the SLC 500 instructions allow you to input or output a series of data words from a single input module or output a series of data words to an output module. The immediate input with mask (IIM) instruction is shown in Figure 17 .
The IIM instruction operates on the inputs assigned to a particular word of a slot. When the IIM rung is true, the program scan is interrupted, and data from a specific input slot are transferred through the mask to the input data file. These data are then available to the commands in the ladder following the IIM instruction. The following parameters are entered in the instruction:
- Slot Specifies the slot and word that contain the data to be updated. For example, I:3.0 means the input of slot 3, word 0.
- Mask Specifies either a hex constant or a register address. For the mask, a 1 in the bit position passes data from the source to the destination. A 0 inhibits or blocks bits from passing from the source to the destination.
- Length Used to transfer more than one word per slot.
The program operation of the instruction is summarized as follows:
- The IIM instruction retrieves data from I:1.0 and passes it through the mask.
- The mask permits only the four least significant bits to be moved to the input register I:1.0.
- This allows the programmer to update only sections of the inputs to be used throughout the rest of the program.
The immediate output with mask (IOM) instruction is shown in Figure 18 .
The IOM operates on the physical outputs assigned to a particular word of a slot. When the IOM rung is true, the program scan is interrupted to update output data to the module located in the slot specified in the instruction. These data are then available to the commands in the ladder following the IOM instruction. The parameters entered are basically the same as those entered for the IIM instruction.
Processor communication with the local chassis is many times faster than communication with the remote chassis. This is due to the fact that local I/O scan is synchronous with the program scan and communication is in parallel with the processor, whereas the remote I/O scan is asynchronous with the program scan and communication with remote I/O is serial. For this reason, fast-acting devices should be wired into the local chassis.
Control Instructions in PLC
Forcing External I/O Addresses
The force function is essentially a manual override control function. Forcing allows the PLC user to turn an external input or output on or off from the keyboard of the programming device. This is accomplished regardless of the actual state of the field device. The forcing capability allows a machine or process to continue operation until a faulty field device can be repaired.
It is also valuable during start-up and troubleshooting of a machine or process to simulate the action of portions of the program that have not yet been implemented. Forcing inputs manipulates the input image table file bits and thus affects all areas of the program that use those bits. The forcing of inputs is done just after the input scan.
When we force an input address, we are forcing the status bit of the instruction at the I/O address to an on or off state. Figure 19 illustrates how an input is forced on. The operation of the program can be summarized as follows:
- The processor ignores the actual state of input limit switch I:1/3.
- Although limit switch I:1/3 is off (0 or false) the processor considers it as being in the on (1 or true) state.
- The program scan records this, and the program is executed with this forced status.
- In other words, the program is executed as if the limit switch were actually closed.
Forcing outputs affects only the addressed output terminal. Therefore, since the output image table fi le bits are unaffected, your program will be unaffected. The forcing of outputs is done just before the output image table file is updated.
When we force an output address, we are forcing only the output terminal to an on or off state. The status bit of the output instruction at the address is usually not affected.
Figure 20 illustrates how an output is forced on. The operation of the program can be summarized as follows:
- The processor ignores the actual state of solenoid output O:2/5.
- The programming device sets the force state in the output force data file and the PLC implements the force to turn solenoid output O:2/5 on even though the output image table fi le indicates that the user logic is setting the point to off.
- M output O:2/6 remains off because the status bit of output O:2/5 is not affected by the force instruction.
- Not all brands of PLCs operate this way. For example, forcing an output with a GE Fanuc controller will cause the contacts that have the same address as the output to also change to the appropriate state.
Overriding of physical inputs on conventional relay control systems can be accomplished by installing hardwire jumpers. With PLC control hardwire jumpers are not necessary because the input data table values can be forced to an on or off state.
The force function allows you to override the actual status of external input circuits by forcing external data bits on or off. Similarly, you can override the processor logic and status of output data file bits by forcing output bits on or off.
By forcing outputs off, you can prevent the controller from energizing those outputs even though the ladder logic, which normally controls them, may be true. In other instances, outputs may be forced on even though logic for the rungs controlling those outputs may be false.
Figure 21 shows the forces version of the data table with bit I:1/3 forced on. You can enter and enable or disable forces while you are monitoring your file offline, or in any processor mode while monitoring your file online. With RSLogix 500 software, the steps are as follows:
- Open the program file in which you want to force the logic on or off.
- With the right mouse button, click the I/O bit you want to force.
- From the menu that appears, select Go to Data Table or select Force On or Force Off.
- From the associated data table that appears, click on the Forces button.
- The Forces version of the data table appears with the selected bit highlighted. Click on this bit with the right mouse button.
- From the menu that appears, you can force the selected bit on or off.
Exercise care when you use forcing functions. If used incorrectly, force functions can cause injuries to persons working around a system, and/or equipment damage. For this reason, forcing functions should be used only by personnel who completely understand the circuit and the process machinery or driven equipment.
You must understand the potential effect that forcing given inputs or outputs will have on machine operation in order to avoid possible personal injury and equipment damage. Before using a force function, check whether the force acts on the I/O point only or whether it acts on the user logic as well as on the I/O point.
Most programming terminals and PLC CPUs provide some visible means of alerting the user that a force is in effect. In situations in which rotating equipment is involved, the force instruction can be extremely dangerous.
For example, if maintenance personnel are performing routine maintenance on a de-energized motor, the machine may suddenly become energized by someone forcing the motor to turn on.
This is why a hardwired master control circuit is required for the I/O rack. The hardwired circuit will provide a method of physically removing power to the I/O system, thereby ensuring that it is impossible to energize any inputs or outputs when the master control is off.
Sufficient emergency circuits must be provided to stop either partially or totally the operation of the controller or the controlled machine or process. These circuits should be hardwired outside the controller so that in the event of total controller failure, independent and rapid shutdown is available.
Figure 22 shows typical safety wiring requirements for a PLC installation. The safety requirements of this installation can be summarized as follows:
- A main disconnect switch is installed on the incoming power lines as a means of removing power from the entire programmable controller system.
- The main power disconnect switch should be located where operators and maintenance personnel have quick and easy access to it. Ideally, the disconnect switch is mounted on the outside of the PLC enclosure so that it can be accessed without opening the enclosure.
- In addition to disconnecting electrical power, you should de-energize, lock out, and tag all other sources of power (pneumatic and hydraulic) before you work on a machine or process controlled by the controller.
- An isolation transformer is used to isolate the controller from the main power distribution system and step the voltage down to 120 VAC.
- A hardwired master control relay is included to provide a convenient means for emergency controller shutdown. Because the master control relay allows the placement of several emergency-stop switches in different locations, its installation is important from a safety standpoint.
- Over-travel limit switches or mushroom head emergency stop pushbuttons are wired in series so that when one of them opens, the master control is de-energized.
- This removes power to input and output device circuits. Power continues to be supplied to the controller power supply so that any diagnostic indicators on the processor module can still be observed.
- Note that the master control relay is not a substitute for a disconnect switch. When you are replacing any module, replacing output fuses, or working on equipment, the main disconnect switch should be pulled and locked out.
The master control relay must be able to inhibit all machine motion by removing power to the machine I/O devices when the relay is de-energized. This hardwired electromechanical component must not be dependent on electronic components (hardware or software).
Any part can fail, including the switches in a master control relay circuit. The failure of one of these switches would most likely cause an open circuit, which would be a safe power-off failure. However, if one of these switches shorts out, it no longer provides any safety protection.
These switches should be tested periodically to ensure that they will stop machine motion when needed. Never alter these circuits to defeat their function. Serious injury or machine damage could result.
Safety PLCs, such as the one shown in Figure 23, are now available for applications that require more advanced safety functionality. A safety PLC is typically certified by third parties to meet rigid safety and reliability requirements of international standards.
Both standard and safety PLCs have the ability to perform control functions but a standard PLC was not initially designed to be fault tolerant and fail-safe. That is the fundamental difference. Some of the differences between standard and safety PLCs include the following:
- A standard PLC has one microprocessor that executes the program, Flash memory area that stores the program, RAM for making calculations, ports for communications, and I/O for detection and control of the machine. In contrast, a safety PLC has redundant microprocessors, Flash and RAM that are continuously monitored by a watchdog circuit, and a synchronous detection circuit. Redundancy is duplication. The probability of hazards arising from one malfunction in an electrical circuit can be minimized by creating partial or complete redundancy (duplication).
- Standard PLC inputs provide no internal means for testing the functionality of the input circuitry. By contrast, safety PLCs have an internal output circuit associated with each input for the purpose of testing the input circuitry. Inputs are driven both high and low for very short cycles during runtime to verify their functionality.
- Safety PLCs use power supplies designed specifically for use in safety control systems and redundant backplane circuitry between the controller and I/O modules.
Safety considerations should be developed as part of the PLC program. A PLC program for any application will be only as safe as the time and thought spent on both personnel and hardware considerations make it. One such consideration involves the use of a motor starter auxiliary seal-in contact, shown in Figure 24, in place of the programmed contact referenced to the output coil instruction.
The use of the field-generated starter auxiliary contact status in the program is more costly in terms of field wiring and hardware, but it is safer because it provides positive feedback to the processor about the exact status of the motor. Assume, for example, that the OL contact of the starter opens under an overload condition. The motor, of course, would stop operating because power would be lost to the starter coil.
If the program was written using an examine-on contact instruction referenced to the output coil instruction as the seal-in for the circuit, the processor would never know that power had been lost to the motor.
When the OL was reset, the motor would restart instantly, creating a potentially unsafe operating condition. Another safety consideration concerns the wiring of stop buttons. A stop button is generally considered a safety function as well as an operating function. As such, all stop buttons should be wired using a normally closed contact programmed to examine for an on condition ( Figure 25 ).
Using a normally open contact programmed to examine for an off condition will produce the same logic but is not considered to be as safe. Assume that the latter configuration is used. If, by some chain of events, the circuit between the button and the input point were to be broken, the stop button could be depressed forever, but the PLC logic could never react to the stop command because the input would never be true.
The same holds true if power were lost to the stop button control circuit. If the normally closed wiring configuration is used, the input point receives power continuously unless the stop function is desired. Any faults occurring with the stop circuit wiring, or a loss of circuit power, would effectively be equivalent to an intentional stop.
Selectable Timed Interrupt
The selectable timed interrupt (STI) instruction is used to interrupt the scan of the main program file automatically, on a time basis, to scan a specified subroutine file. For Allen-Bradley SLC 500 controllers, the time base at which the program file is executed and the program file assigned as the selectable timed interrupt file are determined by the values stored in words S:30 and S:31 of the status section of the data files.
The value in S:30 stores the time base, which may be from 1 through 32,767, at 10 millisecond increments. Word S:31 stores the program file assigned as the selectable interrupt file, which may be any program file from 3 through 999. Entering a 0 in the time-base word disables the selectable timed interrupt.
Programming the selectable timed interrupt is done when a section of program needs to be executed on a time basis rather than on an event basis. For example, a program may require certain calculations to be executed at a repeatable time interval for accuracy.
These calculations can be accomplished by placing this programming in the selectable timed-interrupt file. This instruction can also be used for process applications that require periodic lubrication. The immediate input and immediate output instructions are often located in a selectable timed interrupt file, so that a particular section of program is updated on a timed basis.
This process could be done on a high-speed line, when items on the line are being examined and the rate at which they pass the sensor is faster than the scan time of the program.
In this way, the item can be scanned multiple times during the program scan, and the appropriate action may be taken before the end of the scan. The selectable timed disable (STD) instruction is generally paired with the selectable timed enable (STE) instruction to create zones in which STI interrupts cannot occur.
Figure 26 illustrates the use of the STD and STE instructions and can be summarized as follows:
- In this program, the STI instruction is assumed to be in effect.
- The STD and STE instructions in rungs 6 and 12 are included in the ladder program to avoid having STI subroutine execution at any point in rungs 7 through 11.
- The STD instruction (rung 6) resets the STI enable bit, and the STE instruction (rung 12) sets the enable bit again.
- The first pass bit S:1/15 and the STE instruction in rung 0 are included to ensure that the STI function is initialized after a power cycle.
Allen-Bradley SLC 500 controllers allow you to designate a subroutine file as a fault routine. If used, it determines how the processor responds to a programming error. The program file assigned as the fault routine is determined by the value stored in word S:29 of the status file. Entering a 0 in word S:29 disables the fault routine.
There are two kinds of major faults that result in a processor fault: recoverable and non-recoverable faults. When the processor detects a major fault, it looks for a fault routine. If a fault routine exists, it is executed; if one does not exist, the processor shuts down.
When there is a fault routine, and the fault is recoverable, the fault routine is executed. If the fault is non-recoverable, the fault routine is scanned once and shuts down. Either way, the fault routine allows for an orderly shutdown.
Temporary End Instruction
The temporary end (TND) instruction is an output instruction used to progressively debug a program or conditionally omit the balance of your current program file or subroutines. When rung conditions are true, this instruction stops the program scan, updates the I/O, and resumes scanning at rung 0 of the main program file.
Figure 27 illustrates the use of the TND instruction in troubleshooting a program. The TND instruction lets your program run only up to this instruction. You can move it progressively through your program as you debug each new section. You can program the TND instruction unconditionally, or you can condition its rung according to your debugging needs.
The suspend (SUS) instruction is used to trap and identify specific conditions during system troubleshooting and program debugging.
Figure 28 shows a suspend instruction in a ladder logic rung. The execution of the instruction can be summarized as follows:
- When you program the SUS instruction, you must enter a suspend ID number (number 100 is used in this example).
- When the rung is true, the SUS output instruction places the controller in the suspend mode and the PLC immediately terminates scan cycling.
- All ladder logic outputs are de-energized, but other status files have the data present when the suspend instruction is executed.
- The SUS instruction writes the suspend ID number (100) to S:7 as it executes.
- You can include several SUS instructions in a program, each with a different suspend ID and read S:7 to determine which SUS instruction caused the PLC to halt.
- Status file S:8 will contain the number of the program fi le that was executing when the SUS instruction executed.
- Introduction to Programmable Logic Controllers
- Parts of Programmable Logic Controller
- Input Output Section of PLC
- Discrete I/O Modules of PLC
- Analog I/O Modules of PLC
- I/O Module Specifications of PLC
- Central Processing Unit of PLC
- Boolean Equation for Logic Gate Circuits
- Memory Map for PLC Processor
- PLC Program Scan Cycle
- PLC Programming Languages
- Entering Ladder Diagram
- PLC Ladder Logic Programs
- Timer Instructions in PLC
- Counter Instructions in PLC
- Control Instructions in PLC
- Data Manipulation Instructions in PLC
- PLC Math Instructions
- PLC Sequencer Instructions & Programs
- PLC Shift Register Instructions & Programs
- Installation and Commissioning of PLC
- Troubleshooting of PLC
- Process Control Systems
- PLC Data Communication System